Kaoru Kohira, Naoki Kitazawa,…
A 24mW 5.5Gbps dual frequency conversion demodulator for impulse-radio with first sidelobe
A simplified path interference model in 2D multi-hop wireless power transfer system,
Ryouta Shibuya, Toru Kawajiri…
A programmable ΔΣ SAR-ADC with charge shuttling technique
Kohei Yamada, Yosuke Toyama, …
A low-power third-order ΔΣ modulator using ring amplifiers with power-saving technique
Alexis Gryta, Takuma Suguro a…
A Low EMI SIDO Wireless Power Transfer System with 10usec Response Time,
Toru Kawajiri, Takahiro Morot…
I/Q Mismatch Compensation ΔΣ Modulator Using Ternary Capacitor Rotation Technique,
Masaki Yonekura and Hiroki Is…
A 1.6 Gs/S 3.17 mW 6-B Passive Pipelined Binary-Search ADC with Memory Effect Canceller and Reference Voltage Calibration,
Koki Tanaka, Ryo Saito, and H…
バイナリサーチとフラッシュ動作の動的切替を用いたパワースケーラブルADC
田中公貴，吉岡健太郎，斎藤涼，石黒仁揮，
「バイナリサーチ…
高分解能SAR-ADCのためのS/N比自動判定VCOベース比較器
勝呂拓馬，吉岡健太郎，石黒仁揮，
「高分解能S…
1-W 3.3?16.3-V Boosting Wireless Power Transfer Circuits With Vector Summing Power Controller ,
K. Tomita, R. Shinoda, T. Kuro…