C. Huang, T. Kawajiri, and H. Ishikuro, “A Near-Optimum 13.56 MHz CMOS Active Rectifier with Circuit-Delay Real-Time Calibrations for High-Current Biomedical Implants,” IEEE Journal of Solid-State Circuits (JSSC) Vol. 51, No. 8, pp.1797-1809, 2016.
A 24 mW 5.7 Gbps Dual Frequency Conversion Demodulator for Impulse Radio with the First Sidelobe
Kaoru Kohira, Naoki Kitazawa, and Hiroki Ishikuro, “A 24 mW 5.7 Gbps Dual Frequency Conversion Demodulator for Impulse Radio with the First Sidelobe,” IEICE Trans. Electronics, Vol.E99-C No.10 pp.1164-1173, 2016.
A 12.5Gbps CDR with Differential to Common Converting Edge Detector for the Wired and Wireless Serial Link
Kaoru Kohira and Hiroki Ishikuro, “A 12.5Gbps CDR with Differential to Common Converting Edge Detector for the Wired and Wireless Serial Link,” IEICE Trans. Electronics, Vol.E99-C, No.4 pp.458-465, 2016.
A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver
Atsutake Kosuge, Akira Okada, Masao Taguchi, Hiroki Ishikuro, and Tadahiro Kuroda, “A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver,” IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 63, No. 2, pp. 265 – 275, 2016.
A Switched-Capacitor DC-DC Converter with > 77.3% Efficiency and 80 ns Active Transient Response in 40 μA – 4 mA Load Current Range
Yi Tan and Hiroki Ishikuro, “A Switched-Capacitor DC-DC Converter with > 77.3% Efficiency and 80 ns Active Transient Response in 40 μA – 4 mA Load Current Range,” IEEE 47th European Solid-State Circuits Conference (ESSCIRC), Sept. 13-17, 2021.
A Fast Wake-Up and High Accuracy Sensor Interface by Synchronous Sampling with Power-Efficient Switching Regulator
Yuya Fuketa, Kohei Tatehora, Yohsuke Shiiki, Shuya Nakagawa, and Hiroki Ishikuro, “A Fast Wake-Up and High Accuracy Sensor Interface by Synchronous Sampling with Power-Efficient Switching Regulator,” 2021 IEEE 64th International Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 9-11, 2021.
An up to 35dBc/Hz Phase Noise Improving Design Methodology for Differential-Ring-Oscillators Applied in Ultra-Low Power Systems
Peter Toth and Hiroki Ishikuro, “An up to 35dBc/Hz Phase Noise Improving Design Methodology for Differential-Ring-Oscillators Applied in Ultra-Low Power Systems,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 9-10, Jan., 2021.
Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting
Yi Tan, Yohsuke Shiiki, and Hiroki Ishikuro, “Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 11-12, Jan., 2021.
An 18 Bit Time-to-Digital Converter Design with Large Dynamic Range and Automated Multi-Cycle Concept
Peter Toth and Hiroki Ishikuro, “An 18 Bit Time-to-Digital Converter Design with Large Dynamic Range and Automated Multi-Cycle Concept,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 105-106, Jan., 2021.
A Highly Linear Amp-Less Interface Circuit for Capacitive Sensors with ΔΣ C-DAC
Yuya Maekawa, Syuya Nakagawa, and Hiroki Ishikuro , “A Highly Linear Amp-Less Interface Circuit for Capacitive Sensors with ΔΣ C-DAC,” IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Dec., 2020
