We held a welcome party for Daniel from Technische Universität Braunschweig, Germany. He stayed 3 weeks at our laboratory.
Visiting to AIST
Farewell Party for the graduates
Design of Dual Lower Bound Hysteresis Control in Switched-Capacitor DC–DC Converter for Optimum Efficiency and Transient Speed in Wide Loading Range for IoT Application
Y. Tan, C. Huang and H. Ishikuro, “Design of Dual Lower Bound Hysteresis Control in Switched-Capacitor DC–DC Converter for Optimum Efficiency and Transient Speed in Wide Loading Range for IoT Application,” in IEEE Journal of Solid-State Circuits
T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and −18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver
Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Takuya Kaneko, Hiroki Ishikuro, and Taizo Yamawaki, “T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and −18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver,” IEEE Transactions on Very Large […]
A Switched-Capacitor DC-DC Converter with > 77.3% Efficiency and 80 ns Active Transient Response in 40 μA – 4 mA Load Current Range
Yi Tan and Hiroki Ishikuro, “A Switched-Capacitor DC-DC Converter with > 77.3% Efficiency and 80 ns Active Transient Response in 40 μA – 4 mA Load Current Range,” IEEE 47th European Solid-State Circuits Conference (ESSCIRC), Sept. 13-17, 2021.
A Fast Wake-Up and High Accuracy Sensor Interface by Synchronous Sampling with Power-Efficient Switching Regulator
Yuya Fuketa, Kohei Tatehora, Yohsuke Shiiki, Shuya Nakagawa, and Hiroki Ishikuro, “A Fast Wake-Up and High Accuracy Sensor Interface by Synchronous Sampling with Power-Efficient Switching Regulator,” 2021 IEEE 64th International Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 9-11, 2021.
An up to 35dBc/Hz Phase Noise Improving Design Methodology for Differential-Ring-Oscillators Applied in Ultra-Low Power Systems
Peter Toth and Hiroki Ishikuro, “An up to 35dBc/Hz Phase Noise Improving Design Methodology for Differential-Ring-Oscillators Applied in Ultra-Low Power Systems,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 9-10, Jan., 2021.
Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting
Yi Tan, Yohsuke Shiiki, and Hiroki Ishikuro, “Gate Voltage Optimization in Capacitive DC-DC Converters for Thermoelectric Energy Harvesting,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 11-12, Jan., 2021.
An 18 Bit Time-to-Digital Converter Design with Large Dynamic Range and Automated Multi-Cycle Concept
Peter Toth and Hiroki Ishikuro, “An 18 Bit Time-to-Digital Converter Design with Large Dynamic Range and Automated Multi-Cycle Concept,” 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 105-106, Jan., 2021.