K. Yoshioka, R. Saito, T. Danjo, S. Tsukamoto and H. Ishikuro,
"7-bit .2GS/s Dynamic Architecture and Frequency Scaling Subrange ADC
with Binary-Search/Flash Live Configuring Technique,"
IEEE SSCS Kansai Chapter Technical Seminar, 2014 IEEE Symposium on VLSI
Circuits報告会
大阪 2014年7月（招待講演）
Similar posts
Peter Toth’s paper won the Jan Van Vessem Award for Outstanding EWAA Paper at ISSCC2026
March 6, 202613.3 A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers
January 12, 2026Peter Toth, Paul Shine Eugine, Yerzhan Kudabay, Kaoru Yamashita, Sebastian Halama, Hiroki Ishikuro, Christian Ospelkaus, Vadim Issakov, “13.3 A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers,” 2025 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2025.
A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique
January 12, 2026K. Yamashita, K. Yoshioka, C. Ziegler, V. Issakov and H. Ishikuro, “A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique,” 2025 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2025.
No Comments Yet