K.Niitsu, Y. Kohama, Y. Sugimori, K. Kasuga, K. Osada, N. Irie, H. Ishikuro, and T. Kuroda, "Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.18 , No. 8, pp. 1238 – 1243, Aug., 2010.
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