A Low-IF CMOS Single-Chip Bluetooth EDR Transmitter with Digital I/Q Mismatch Trimming Circuit ; H. Ishikuro, D. Miyashita, T. Shimada, T. Tanzawa, S. Kousai, H. Kobayashi, H. Majima, K. Agawa, M.Hamada, and F. Hatori ; Symposium on VLSI Circuits ; IEEE ; 京都 ; ; 2005/06?
Similar posts
13.3 A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers
January 12, 2026Peter Toth, Paul Shine Eugine, Yerzhan Kudabay, Kaoru Yamashita, Sebastian Halama, Hiroki Ishikuro, Christian Ospelkaus, Vadim Issakov, “13.3 A Cryo-BiCMOS Controller for 9Be+-Trapped-Ion-Based Quantum Computers,” 2025 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2025.
A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique
January 12, 2026K. Yamashita, K. Yoshioka, C. Ziegler, V. Issakov and H. Ishikuro, “A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique,” 2025 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2025.
A 4.2–373 K Functional 800-MS/s 12-b Buffer-Then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC With Integrated Active-Hold Technique
January 12, 2026K. Yamashita, K. Yoshioka, C. Ziegler, V. Issakov and H. Ishikuro, “A 4.2–373 K Functional 800-MS/s 12-b Buffer-Then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC With Integrated Active-Hold Technique,” in IEEE Journal of Solid-State Circuits, 2025.

No Comments Yet