An 8bit .8V MS/s 2bit/step SAR ADC with Wide Range Threshold Configuring Comparator Kentaro Yoshioka, Akira Shikat… 続きを読む
Voltage-Boosting Wireless Power Delivery System With Fast Load Tracker by ΔΣ-Modulated Sub-Harmonic Resonant Switching, Ryota Shinoda, Kazutoshi Tomit… 続きを読む
A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS, R. Sekimoto, A. Shikata, K. Yo… 続きを読む
A 0.0058mm2 7.0 ENOB 24MS/s 17fJ/conv. Threshold Configuring SAR ADC with Source Voltage Shifting and Interpolation Technique, K. Yoshioka, A. Shikata, R. Se… 続きを読む
1W 3.3V-to-16.3V Boosting Wireless Power Transfer Circuits with Vector Summing Power Controller, Kazutoshi Tomita, Ryota Shinod… 続きを読む
A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with Tri-Level Comparator in 40nm CMOS, Akira Shikata, Ryota Sekimoto,… 続きを読む
A 40nm 50S/S – 8MS/S Ultra Low-Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator Ryota Sekimoto, Akira Shikata,… 続きを読む