M. Nomura, A. Muramatsu, H. Ta…
0.5V Image Processor with 563 GOPS/W SIMD and 32bit CPU Using High Voltage Clock Distribution (HVCD) and Adaptive Frequency Scaling (AFS) with 40nm CMOS,
A 0.7V Intermittently Operating LNA with Optimal On-Time Controller for Pulse-Based Inductive-Coupling Transceiver,
Teruo Jyo, Tadahiro Kuroda, an…
A 1.26mW/Gbps 8 Locking Cycles Versatile All-Digital CDR with TDC Combined DLL,
Yuki Urano, Won-Joo Yun, Tadah…
A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC with 98% Leakage Power Reduction by Boosted Self Power Gating,
Ryota Sekimoto, Akira Shikata,…
タイミング最適化非同期クロック生成器を搭載した40nm超低電圧SAR ADC
関本竜太、志方明、吉岡健太郎、黒田忠広、石黒仁揮、「タイミン…
多相発振器による適応パルス幅制御を用いた低電圧・高速磁界結合通信機
浦野雄貴、松原岳志、林勇、アブル・ハサン・ジョハリ、小平薫、…
1/f Noise Characteristic in Independent-Double-Gate-FinFET
Hideo Sakai, Shin-ichi O’uchi,…
High-Frequency Precise Characterization of Intrinsic FinFET,
H. Sakai, S. Ouchi, T. Matsuka…
An 8bit .8V MS/s 2bit/step SAR ADC with Wide Range Threshold Configuring Comparator
Kentaro Yoshioka, Akira Shikat…
Voltage-Boosting Wireless Power Delivery System With Fast Load Tracker by ΔΣ-Modulated Sub-Harmonic Resonant Switching,
Ryota Shinoda, Kazutoshi Tomit…