7-bit .2GS/s Dynamic Architecture and Frequency Scaling Subrange ADC with Binary-Search/Flash Live Configuring Technique, K. Yoshioka, R. Saito, T. Danj… 続きを読む
A SAW-Less LTE Transmitter with High-Linearity Modulator Using BPF-Based I/Q Summing, Takahiro Nakamura, Naoki Kitaz… 続きを読む
7-bit .2GS/s Dynamic Architecture and Frequency Scaling Subrange ADC with Binary-Search/Flash Live Configuring Technique, K. Yoshioka, R. Saito, T. Danj… 続きを読む
An 8b Extremely Area Efficient Threshold Configuring SAR ADC with Source Voltage Shifting Technique, K. Yoshioka, A. Shikata, R. Se… 続きを読む
An 8 bit .8 V MS/s 2-bit/step SAR ADC with Successively Activated Threshold Configuring Comparators in 40 nm CMOS, K. Yoshioka, A. Shikata, R. Se… 続きを読む
A Low Power Area Efficient Frequency Acquisition Circuit with Array Oscillator for Pulse-Based Inductive-Coupling Transceiver, Teruo Jyo, Tadahiro Kuroda, Hi… 続きを読む