A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC with 98% Leakage Power Reduction by Boosted Self Power Gating,

Ryota Sekimoto, Akira Shikata, Kentaro Yoshioka, Tadahiro Kuroda, and Hiroki Ishikuro, "A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC with 98% Leakage Power Reduction by Boosted Self Power Gating," at IEEE Asian Solid-State Circuits Conference (ASSCC) 2012, Kobe, Japan, Nov. 14, 2012.