47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking,

M. Saito, Y. Yoshida, N. Miura, H. Ishikuro, and T. Kuroda, "47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking," IEEE Transactions on Circuits and Systems I, Vol. 57 , No. 9
pp.2269 ? 2278, Sept. 2010.