An Outside-Rail Opamp Design T…
An Outside-Rail Opamp Design Targeting for Future Scaled Transistors
CMOS LC-VCOの位相雑音最小化
CMOS LC-VCOの位相雑音最小化 ; 宮下、石黒、香西…
A Phase Noise Minimization of CMOS VCOs over Wide Tuning Range and Large PVT Variations
A Phase Noise Minimization of …
A 1.2-V CMOS Complex Bandpass Filter with a Tunable Center Frequency
A 1.2-V CMOS Complex Bandpass …
ディジタルI/Qミスマッチ補正回路を搭載したlow-IF方式シングルチップCMOS Bluetooth-EDR送信機
ディジタルI/Qミスマッチ補正回路を搭載したlow-IF方式…
A Low-IF CMOS Single-Chip Bluetooth EDR Transmitter with Digital I/Q Mismatch Trimming Circuit
A Low-IF CMOS Single-Chip Blue…
Low frequency spurs of VCO due to noise propagation from digital I/O’s and their effects on performance of Bluetooth SoC
Low frequency spurs of VCO due…
An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors,
K.Ishida, A.Tamtrakarn, H.Ishi…
60% Power Reduction in Inductive-Coupling Inter-Chip Link by Current-Sensing Technique,
K. Niitsu, N. Miura, M. Inoue,…
A 2.4-GHz Temperature compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitter
A 2.4-GHz Temperature compensa…