Ryota Sekimoto, Akira Shikata, Tadahiro Kuroda, and Hiroki Ishikuro, A 40nm 50S/S – 8MS/S Ultra Low-Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator, at 37th European Solid-State Circuits Conference (ESSCIRC), Helsinki, Finland, Sept. 12-16, 2011.
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